1. Technical Field
The present invention relates to a display apparatus, and more particularly to an active matrix display apparatus in which a plurality of display pixels, which are selected by a predetermined scan line selection signal with respect to a scan line and also to which an image signal from a data signal line is supplied, are arranged in a matrix form on a substrate.
2. Related Art
This application claims priority to Japanese Patent Applications No. 2006-278144 and No. 2006-278149, both filed on Oct. 11, 2006, which are incorporated herein by reference in its entirety.
Active matrix display apparatuses in which a plurality of scan lines and a plurality of data lines intersecting the scan lines are arranged on a glass substrate or the like, and a switching circuit and a display pixel are disposed at an intersection of each scan line and each data signal line, as in a liquid crystal display element, have been widely used. In regards to these active matrix display apparatuses, a technology for reducing power consumption by displaying a dummy still image or the like when intended image display is not being performed has been considered.
For example, JP-A-2001-264814 discloses an active matrix liquid crystal display apparatus capable of performing multicolor display with low power consumption in a standby state and performing halftone display and moving image display in full color at other times, such as, in a mobile phone application, during a call. Here, a first switching element includes a gate connected to a scan line, a source connected to a data signal line, and a drain connected to a pixel electrode. The pixel electrode is connected to a digital memory via a second switching element which is composed of two switching elements which are connected in parallel. These switching elements include drains connected to an output terminal and an inverted output terminal of the digital memory, respectively, sources connected to the pixel electrode, and gates connected to two control signal lines, respectively.
JP-A-2002-91366 discloses a structure corresponding to two types of display, full color moving image display and still image display with low power consumption, in a single display apparatus. In this structure, a circuit selection circuit composed of two TFTs having different polarities and another circuit selection circuit, which together form a pair, are provided in the vicinity of an intersection of a gate signal line and a drain signal line in a pixel electrode. Further, an image selection circuit which is composed of two TFTs having different polarities is provided adjacent to the circuit selection circuit such that each of the two TFTs of the image selection circuit is connected in series with a respective one of the two TFTs of the circuit selection circuit described above. The gate signal line is connected to the gates of the two TFTs of the image selection circuit, and both TFTs are simultaneously turned ON in accordance with a scan signal. When the two circuit selection circuits select full color moving image display, one of the two TFTs of the circuit selection circuit and a storage capacitor constitute a first display circuit. On the other hand, a holding circuit formed of a static memory is connected between the other one of the two TFTs of the circuit selection circuit and the pixel electrode of liquid crystal. A signal selection circuit, in accordance with a signal from the holding circuit, selects an alternate current drive signal (signal A) or a opposing electrode signal (signal B), and the selected signal is supplied to the pixel electrode of the liquid crystal 21. Accordingly, when the two circuit selection circuits select the still image display, the other one of the two TFTs of the circuit selection circuit and the holding circuit constitute a second display circuit.
With the related art structures described above, when analog full color display such as halftone gray level display is not performed, binary digital still image data is held by a digital memory or a static memory to thereby perform still image display, so that the power consumption concerning image display in the standby state can be reduced.
According to the above related art, however, because the same scan lines are used in both analog display and digital display, a scan line drive circuit is also shared, and the power consumption related to scan line driving and the like remains unchanged. Further, the above related art structures also suffer from an inconvenience because processing of writing dummy data in a non-display region or the like must be performed, even when digital display is performed in an arbitrary display region.